Quantitative Systems Engineering · Commercial Risk · Statistical Machine Learning

Nimit Jain

Data Scientist & Quantitative Systems Engineer specializing in commercial banking credit risk, half-hourly time-series forecasting, embedded motor-drive firmware, and formal mathematical verification.

Download Resume (PDF) ↓ Career Trajectory ↓ Credit Copilot Demo → Power Alpha Forecaster → Collections OS → Navier-Stokes (Lean 4) →
Current Role
Data Scientist I
Kotak Mahindra Bank · Commercial Risk
Hardware & Research
STMicro
X-CUBE-ISO1 & IEEE PCIM Asia 2025
Academic Dual Degree
BITS Pilani
M.Sc. Math + B.E. EEE · CGPA 7.48
Quant Ranking
Global #4 / 1400+
AlphaGrep Alphaverse League '23

Interactive Spatial Trajectory · Verified Ground Truth

Professional Journey & Connected Systems

An animated, scroll-driven perspective of the engineering journey from foundational mathematics to high-voltage firmware and commercial banking risk systems.

Official Resume PDF ↓
Apr 2026 – Present · Full-Time · Bengaluru, India
Kotak Mahindra Bank · Commercial Banking Risk

Data Scientist I (Promoted from Associate III, Jun 2025 – Mar 2026)

CURRENT TENURE
  • Holistic Collections Turnaround: Architected portfolio-wide collections intervention, reducing bounce rates by 4.3% in initial 5 months to deliver the lowest monthly credit cost in 3 years.
  • Dynamic Telecalling & Automated Bot Routing: Built multi-tier dispatch routing pre-due and post-due accounts dynamically across internal calling desks, agencies, and voice bots, curtailing roll-forward delinquency.
  • Field Recovery KPI Pipelines: Engineered automated Apache Airflow pipelines tracking hierarchical field agent KPIs, expanding MoM visit coverage to clear backlogs and lower portfolio-level roll-forward rates by 5.5%.
  • Bureau Delinquency Integration: Synthesized internal loan delinquency data with bureau records to intercept off-us debt servicing leakage, executing early repossession that recovered ₹5.8 Cr and raised recovery efficiency by 23%.
  • Bharat Mortgages Segment Sizing: Processed 60M+ borrower records with risk filters in Python & SQL, structuring a ₹9,000 Cr pre-approved expansion segment presented to executive leadership.
Connected Flagship Projects: Loan Underwriting Copilot (ROC-AUC 0.786) → Collections OS (Compliance Guardrails) →
Jul 2024 – Jun 2025 · Engineering Internship · Greater Noida, India
STMicroelectronics · Embedded Systems & Power Electronics

Project Trainee · Motor Control & Microcontroller Firmware

IEEE PUBLICATION
  • Production Firmware Release (X-CUBE-ISO1): Engineered and published the production-grade X-CUBE-ISO1 software package in C for STM32 microcontrollers, implementing modular driver architecture, dynamic memory safety, and MISRA-C compliance.
  • PyPWM Framework & IEEE Publication: Developed PyPWM, an object-oriented Python framework for algorithmic simulation and harmonic distortion analysis of inverter PWM strategies. Co-authored conference research paper published at PCIM Asia 2025 and indexed on IEEE Xplore.
  • Inverter Switching Optimization: Achieved an exact 33.0% switching loss reduction via Discontinuous PWM (DPWM1) 60° phase clamping and extended DC-bus voltage utilization by 15.5% on STM32 ARM Cortex-M4 test benches.
Connected Flagship Projects: Inverter PWM Synthesizer & FFT → Associative Digit Memory Engine (SIMD C) →
2020 – 2025 · Academic Dual Degree · Pilani, India
Birla Institute of Technology and Science (BITS), Pilani

M.Sc. Mathematics & B.E. Electrical & Electronics Engineering · CGPA: 7.48 / 10

10-SEM SCHOLARSHIP
  • 10-Semester Merit Scholarship: Awarded and retained the university Merit-cum-Need (MCN) Scholarship continuously across all 10 academic semesters.
  • Global Rank 4 / 1,400+ (Alphaverse Premiere League 2023): Placed 4th globally in AlphaGrep Securities' quantitative algorithmic trading competition, engineering systematic equity alphas with high Sharpe ratios over simulated order books.
  • Vice President, Mathematics Association: Directed a 50-member academic council organizing national mathematical symposiums, quantitative trading hackathons, and technical competitions for 1,500+ participants.
  • Rigorous Mathematical Curriculum: Probability & Statistics, Econometrics, Stochastic Processes, Mathematical Modeling, Numerical Optimization, Real Analysis, Linear Algebra, and Control Systems.
Connected Flagship Projects: Navier-Stokes Formalization (Lean 4) → Power Price Alpha (77k Predictions) →

Production Architectures · Quantitative Alphas · Formal Methods

Flagship Engineering Systems

Flagship 01 · Commercial Banking

233 Tests Passing

Loan Underwriting Copilot

Production credit risk decisioning service: XGBoost probability estimation, isotonic calibration, SHAP attribution, adverse-action reason codes, and ChromaDB precedent retrieval with numeric grounding verification.

ROC-AUC
0.786
[0.721, 0.845]
Optimal Threshold
21.2%
5:1 Cost Matrix
Cost / Applicant
0.584
vs 0.700 decline-all
XGBoostSHAPChromaDBFastAPIDocker

Flagship 02 · Quantitative Finance

205 Tests Passing

Power Price Alpha Forecaster

Day-ahead GB electricity price forecaster backtested walk-forward over 4.5 years (77,109 settlement periods). Features conformalized prediction intervals and simulated battery arbitrage under degradation frictions.

MAE Lift
+22.2%
vs Strongest Baseline
Trading Lift
+53.8%
Battery P&L vs Naive
Out-of-Sample
77,109
Half-hourly periods
XGBoostWalk-ForwardConformalBattery P&LStatsmodels

Fintech Infrastructure

Collections OS

Autonomous debt collections platform: Dagster software-defined assets, dbt transformations, LightGBM bounce scoring, and automated compliance guardrails.

DagsterdbtLightGBMSoda Contracts

Formal Mathematics

Navier-Stokes (Lean 4)

Machine-checked formal verification of 3D incompressible Navier-Stokes in Lean 4 Mathlib, alongside pseudospectral Runge-Kutta simulation of blowup candidates.

Lean 4MathlibPseudospectralFFT

Hardware & Research

Inverter PWM Synthesizer

PyPWM algorithmic framework for SPWM, SVPWM, and DPWM1 modulation, reducing inverter switching losses by 33% on STM32 ARM Cortex-M4 hardware.

Embedded CPyPWMIEEE Xplore

Low-Latency ML

Digit Memory Engine

Sub-12μs handwritten digit recognition engine in cache-aligned SIMD C without backpropagation, using 64-bit bitwise Hamming distance classification.

SIMD CAVX2 PopcountZero Backprop

Vector Search

Dual-Index Hybrid Retrieval

Multi-tiered vector search combining sub-5μs exact byte-hash caching with KDTree spatial indexing and distance-weighted voting under Gaussian noise.

KDTreeByte HashZero DB

Digital Textbook

Interactive ML Notebook

31 interactive lessons covering mathematical foundations, probabilistic models, transformers, and agent systems with 185 live browser labs.

31 Lessons185 LabsZero CDN